1. Field of Invention
This invention relates to a bumping process. More particularly, the present invention is related to a method of forming high-quality bumps for a high-density package.
2. Related Art
In this information explosion age, integrated circuit products are used almost everywhere in our daily life. As fabricating technique continue to improve, electronic products having powerful functions, personalized performance and a higher degree of complexity are produced. Nowadays, most electronic products are relatively light and have a compact body. Hence, in semiconductor production, various types of high-density semiconductor packages have been developed. Flip chip is one of the most commonly used techniques for forming an integrated circuit package. In a flip-chip package, the bonding pads on a die and the contacts on a substrate are connected together through a plurality of bumps. Hence, compared with a wire-bonding package or a tape automated bonding (TAB) package, a flip-chip package uses a shorter electrical path on average and has a better overall electrical performance. Moreover, the back surface of a flip-chip die may be exposed to the outside to increase the performance of the heat dissipation of said flip chip package. Due to the above and other reasons, flip-chip packages are produced in large volumes in the semiconductor industry.
FIG. 1 to FIG. 4 are partially enlarged cross-sectional views showing the progression of steps in a conventional method of forming a bump on the surface of a metallurgy layer 120 includes an adhesion layer and one or a stack of metallic layers, for example a barrier layer and a wetting layer. To form the under bump metallurgy layer 120, a sputtering process is first conducted to form an adhesion layer on the active surface 112 of the wafer 110. Next, a sputtering or plating process is conducted to form one or more metallic layers over the adhesion layer. Thereafter, photolithography and etching processes are used to pattern the under bump metallurgy layer 120 so that a residual portion of the under bump metallurgy layer 120 remains on top of the bonding pad 116.
As shown in FIG. 2, a spin-coating process is conducted to form a photoresist layer 130 over the active surface 112 of the wafer 110, wherein the photoresist layer 130 can be a dry film. Through photolithography and etching processes, a plurality of openings 132 (only one opening is shown) are formed in the photoresist layer 130. The openings 132 expose the under bump metallurgy layer 120. Next, as shown in FIG. 3, a flux material 160 is dispensed in the openings 132 and above the surface of the photoresist layer 130. Afterwards, a solder ball mounting process is performed to place the solder balls 140 in the openings 132 as shown in FIG. 3. Then a reflow process is performed to dispose the solder balls above the bonding pads 116 more securely as shown in FIG. 4, wherein the solder balls 140 are directly mounted onto the under bump metallurgy layers 120 and the flux material 160 flows on the surfaces of the solder balls 140 and vaporized. Thereafter, a liquid cleaner is applied to remove the residual flux material from the surface of the solder balls 140. Finally, the photoresist layer 130 is removed from the active surface 112 of the wafer 110 as shown in FIG. 4 so that a bump 150 is produced. Therein, the bump 150 actually comprise the solder ball 140 and the under bump metallurgy layer 120.
In the aforementioned fabrication process, the solder ball 140 is disposed into the openings 132 of the photoresist layer 130 by a solder ball placer. However, the flux material 160 is easily flowed into the solder ball placer so as to contaminate said solder ball placer. In addition, the flux material 160 will enhance the connection between the solder balls so as to lower the performance and operation efficiency of said solder ball placer.
Therefore, providing another method for forming bumps to solve the mentioned-above disadvantages is the most important task in this invention.